1. Field of the Invention
The present invention relates generally to a next-generation mobile communication system. In particular, the present invention relates to a high-speed cell searching method and apparatus using a distributed sample acquisition scheme (DSA) and a differentially-coherent phase shift keying (DPSK)-based DSA (hereinafter referred to as D2SA) in a direct sequence code division multiple access (DS/CDMA) system.
2. Background of the Related Art
Generally, in a DS/CDMA communication system, a receiver is required to synchronize (Psuedo-Noise) PN sequences prior to detection of data. Mostly, the PN sequence synchronization is performed by two steps of code acquisition and code tracking in sequence. Here, regarding the code acquisition, research for a high-speed acquisition technique to shorten the acquisition time has been made with great interest and anxiety.
The most basic code acquisition technique proposed up to now is a serial search. This method has an advantage that its implementation is not complex, but has a disadvantage that since the acquisition time is directly proportional to the period of the PN sequence being used, acquisition time is quite long when the period of the PN sequence is long.
Meanwhile, a parallel search has been proposed to acquire the PN sequences having a long period. However, this parallel search has a disadvantage that its implementation becomes complicated in proportion to the reduced acquisition time.
Ultimately, a hybrid method, which properly balances the acquisition speed and the complexity of implementation by adequately combining the serial search and the parallel search for the high-speed acquisition of the PN sequences, has been proposed. Another high-speed acquisition method based on state estimation of a shift register generator (SRG) has been proposed as well.
The acquisition technique based on the state estimation of the SRG acquires rapid acquisition by sequential estimation. This technique sequentially performs a hard detection of the received PN sequences a large number of times, carries them as temporary register state values of the receiving part SRG, and then finally decides whether or not it is synchronized through a confirming process. In theory, this technique has an advantage that it can greatly reduce the acquisition time without increasing the implementation complexity in comparison to the serial search. However, it has a disadvantage that its performance abruptly deteriorates when it is based on a coherent detection of the PN sequences and has a low signal-to-noise ratio (SNR). Thus, it is improper to apply this technique in a general code division multiple access (CDMA) environment.
Because of this, an acquisition technique based on a new state estimation has been proposed. This technique, named a distributed sample acquisition (DSA) technique, reduces the acquisition time of the long-period PN sequences using hardware having minimal complexity in the conventional DS/CDMA type cellular system.
According to this DSA technique, the transmitting part generates an igniter sequence having a relatively short period, and transmits the igniter sequence with state samples of the long-period PN sequences being carried thereon. The receiving part first acquires the igniter sequence, demodulates the state samples carried thereon, and corrects the SRG state of the receiver through a comparison-correction circuit at every accurate time point. In this way, synchronization of the PN sequences is performed.
A pair of SRGs having the same structure are provided in the transmitting/receiving part to perform the synchronization by carrying the same state values, i.e., L values stored in the SRG having the length of L. Therefore, they can transfer the state samples of the transmitting part SRG to the receiving part using the DSA technique. As a result, this technique can acquire the PN sequence much faster than the existing technique that performs the synchronization at the time point where the maximum correlation value for the PN sequences is detected.
Since the high-speed acquisition using the DSA technique as described above is performed prior to the phase estimation of the carrier, coherent demodulation cannot be used for transferring information. Thus, an orthogonal modulation has been conventionally used for modulating information. According to the conventional high-speed acquisition using the DSA, the orthogonal modulation which uses 2b-ary orthogonal symbols to simultaneously transfer b (b≧1) state symbols for the SRG that generates the long-period PN sequences has been employed.
As a result, in the conventional base station (i.e., transmitter), 2b-ary orthogonal symbols corresponding to the b state symbols for the SRG are generated at the respective sampling time points, and these symbols are spread by the relatively short-period igniter sequences to broadcast them through a pilot channel.
Meanwhile, in the mobile station (i.e., receiver), 2b correlators (or, matched filters) are used for acquiring the igniter sequence. Specifically, the mobile station confirms whether the maximum value among the correlator output energies for each phase exceeds a predetermined threshold value as it changes the phase of the igniter sequence. If the maximum value of the 2b correlator output energies exceeds the threshold value for a specified phase, the mobile station declares that the igniter sequence is acquired, and then confirms which correlator has the maximum output energy in a state that the phase of the sequence is fixed. Then, the detection of the 2b-ary quadrature symbols is performed. Finally, the synchronization of the scrambling sequence is effected by decoding the detected quadrature symbols into b state samples, and using these state samples for the state correction of the mobile station SRG (it generates the long-period PN sequences).
FIG. 1 is a block diagram illustrating the selective structure of a related art parallel sampling despreader provided in a receiver in the next-generation DS/CDMA system using the general quadrature-modulation-based DSA technique. FIGS. 2A and 2B are drawings illustrating respective operation modes of a decision logic circuit used in the related art next-generation DS/CDMA system using the general quadrature-modulation-based DSA technique. Specifically, FIG. 2A shows the decision logic circuit which operates in an igniter sequence acquisition mode, and FIG. 2B shows the decision logic circuit which operates in a state sample detection mode.
The state signal r(t) having arrived at the receiving part is despread by 2b quadrature symbol correlators, integrated for a symbol time with integrators 60, 61 and 62) and then converted into input values |Yj|(j=0, 1, . . . , 2b−1) of the 2b decision logic circuits by taking their absolute values. In the actual implementation, the absolute value is generally obtained via absolute value units 63, 64 and 65 by multiplying the in-phase (I-phase) value and the quadrature-phase (Q-phase) value of the output of the integrating section and then obtaining a square root value thereof. At this time, the correlation signal used for correlating with the state signal in the j-th quadrature symbol correlator is a conjugate complex signal of the spread quadrature signal mj(t), that is obtained by multiplying the quadrature symbol signal sj(t) and the igniter sequence signal c(t) used for the quadrature modulation in the transmitting part. The value |Yj|(j=0, 1, . . . , 2b−1) are then input to the decision logic section 69.
FIGS. 2A and 2B illustrate the operation of the decision logic section 69 in FIG. 1. The decision logic circuit operates differently in the igniter sequence acquisition mode and in the state sample detection mode. In the igniter sequence acquisition mode (i.e., the step prior to the igniter sequence acquisition), the maximum value among the 2b input values |Yj|(j=0, 1, . . . , 2b−1) is compared with the predetermined threshold value R0. If the maximum value is larger than the threshold value, the decision logic circuit declares the sequence phase consistent state H1, and goes to the acquisition confirmation step. If the maximum value is smaller than the threshold value, the decision logic circuit declares the sequence phase discrepant state H0, and checks whether the next sequence phase is consistent.
In the state sample detection mode (i.e., the step after the igniter sequence acquisition), the decision logic circuit determines which value is the maximum value among the 2b input values |Yj|(j=0, 1, . . . , 2b−1), and detects the corresponding quadrature state symbol Sj. This state symbol is demapped by b state samples.
The high-speed acquisition using the related art DSA technique has various problems. For example, if the number (b) of the state samples simultaneously sampled and transmitted by the SRG that generates the long-period PN sequences is increased, the number of the correlators to operate simultaneously is geometrically increased in the mobile station.
This not only increases the hardware complexity, but also brings unsatisfactory results in the performance of the igniter sequence acquisition.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.